Memory Alignment for VSTM/VLDM Instructions on Cortex R52

Hello All,

Assumptions : 

1.SIMD operations are enabled.

2.Q0 - Q7 registers contain value zero.

3.r0 contains the array pointer which will zero out the memory.

I am using vstm instruction to zero out memory out faster. 

VSTM         r0!, {q0 - q7}

I wanted to know what type of memory alignment is required before doing this operation? Will it give it an alignment fault if used with device type memory?



More questions in this forum
There are no posts to show. This could be because there are no posts in this forum or due to a filter.