Is CPSR.F settable through debug port? (e.g. JTAG)


Embedded SW cannot set CPSR.F for obvious reasons. However, for test purposes, it is needed that the debug interface has access to set CPSR.F (e.g. to make sure the SW correctly clears it). Is it possible to set CPSR.F through debug port for Cortex-R5F? It is not clear in the TRM documentation.



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