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Cortex-M / M-Profile forum
Description
The Cortex-M processor family is optimized for cost and power-efficient microcontrollers. Cortex-M35P, Cortex-M33, Cortex-M23, Cortex-M7, Cortex-M4, Cortex-M3, Cortex-M1, Cortex-M0+, Cortex-M0
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712 Questions
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Unanswered questions
Forum FAQs
6 days ago
Why the address of fuction printed is not same as the one mentioned in map file
Not Answered
13 days ago
stmdb instruction *appears* not to work correctly - Cortex M4 / SAM4L
Suggested Answer
2 days ago
Compiling and programming are successful, but program does not run at all
Not Answered
3 days ago
I have a doubt about memory addresses ¿Any expert?
Not Answered
3 days ago
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Cortex M3 testbenches
0
1144
views
3
replies
Latest
7 months ago
by
Andy Neil
Not Answered
What is the behavior for a "BKPT" instruction in a HardFault handler
0
4957
views
5
replies
Latest
7 months ago
by
Gutierrez
Not Answered
Cortex-M0--Simple APB peripheral Design (LED)
0
Cortex-M0
Cortex-M System Design Kit
1335
views
2
replies
Latest
7 months ago
by
Mezan1
Not Answered
system reset request (NVIC_systemreset) does not restart the M4 controller
0
Cortex-M4
1970
views
3
replies
Latest
7 months ago
by
42Bastian Schick
Not Answered
Cortex-M7 (Armv7-M) Fault Question
0
591
views
1
reply
Latest
7 months ago
by
42Bastian Schick
Answered
timestamp generator register location on Cortex-M4 (PSELCTRL CNTCR)
0
CoreSight Architecture
Cortex-M
Debugging
CoreSight
Cortex-M4
2518
views
3
replies
Latest
8 months ago
by
42Bastian Schick
Not Answered
LPC546xx MASS ERASE ulink2
0
544
views
0
replies
Started
8 months ago
by
Dark0711
Not Answered
How to determine CMSIS version?
0
CMSIS
2666
views
4
replies
Latest
8 months ago
by
42Bastian Schick
Suggested Answer
Timer interrupts synchronization in Cortex M4
0
Cortex-M4
Interrupt
1679
views
2
replies
Latest
8 months ago
by
Andy Neil
Answered
Cortex M0 - Returning from Interrupt
0
Cortex-M0
Arm Education Media
4755
views
13
replies
Latest
8 months ago
by
Mezan1
Not Answered
gcc does not generate correct code while building PIC
0
GCC
Thumb
GNU Arm
Thumb2
Arm Assembly Language (ASM)
Cortex-M4
2344
views
3
replies
Latest
8 months ago
by
a.surati
Not Answered
Setting MPU_RASR for Memory Protection Unit with correct values of TEX/C/B/S bits
0
1154
views
1
reply
Latest
8 months ago
by
Uma Ramalingam
Not Answered
Cortex M3 System Design - Simulation Environment
0
1302
views
2
replies
Latest
8 months ago
by
Brixton
Not Answered
uart problem!!
0
1612
views
3
replies
Latest
8 months ago
by
42Bastian Schick
Not Answered
Abstraction layer for multiple vendors
0
1336
views
4
replies
Latest
8 months ago
by
pietro
Answered
Cortex M4 and ARM FIR Q15 Hardfault
0
Library
CMSIS
Cortex-M4
1272
views
1
reply
Latest
8 months ago
by
KoRba
Not Answered
Hi ARM, Hi ARM, hardfault_handler()
0
1658
views
3
replies
Latest
8 months ago
by
Andy Neil
Not Answered
How to realise a dual-core "LOCK-STEP" Cortex-M7 at the integration level?
0
1602
views
2
replies
Latest
8 months ago
by
Uma Ramalingam
Not Answered
Cannot access Memory (@ 0xe000edf0, Read, Acc Size: 4 Byte)
0
ulinkpro
Cortex-M4
3624
views
6
replies
Latest
8 months ago
by
c m
Not Answered
cortex M4 boot issue
0
2535
views
5
replies
Latest
8 months ago
by
d.ry
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