for Cortex-M0, M3 and M4, I can find the execution time in their Technical Reference Manual > Programmers Model > Instruction set summary 里面查看
but for M7 It said that I should go to <ARMv7-M Architecture Reference Manual.>
“The processor implements the ARMv7-M instruction set and features provided by the ARMv7E-M architecture profile. For more information about the ARMv7-M instructions, see the ARMv7-M Architecture Reference Manual.” -----《ARM Cortex-M7 Processor Technical Reference Manual》Programmers Model > Instruction set summary > Binary compatibility with other Cortex processors
But in <ARMv7-M Architecture Reference Manual.> I still can't find it. what should I do?
Arm don't publish a cycle timing table for the M7.
As many instructions are dual issued overall code performance/bench marking is probably more useful than trying to calculate timing by adding sequential instruction timing.
thanks for your reply. I am still a little confused. what's the dual issued? because all the other uP has given the cycles table except M7. Is there any official explanation for this issue?
you said benchmark is more useful for M7, do you mean that 'adding sequential instruction timing' is also more useful for other cortex device?
Thank you very much
I know the dual-issue means that for every instruction cycle it fetch 2 instructions. But during my debugging, I use STM32F746 and debug in Keil-MDK, it seems like that the execution cycle is the same with it in other cortex device. for example the MOV, MUL.... are all 12 state cycle(clock cycle), which is just a machine cycle. Is that means, the dual-issue doesn't work at this part?
View all questions in Cortex-M / M-Profile forum