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Hard Fault in cortex m4

Hello All,

Good Morning!

I am working on Cortex m4.

I have read following about hard fault ,

"Bus Fault: detects memory access errors on instruction fetch, data read/write, interrupt vector fetch, and register stacking (save/restore) on interrupt (entry/exit)

Memory Management Fault: detects memory access violations to regions that are defined in the Memory Management Unit (MPU); for example code execution from a memory region with read/write access only.

Usage Fault: detects execution of undefined instructions, unaligned memory access for load/store multiple. When enabled, divide-by-zero and other unaligned memory accesses are also detected. Hard Fault: is caused by Bus Fault, Memory Management Fault, or Usage Fault if their handler cannot be executed"

Can anyone please explain with examples about Bus, Memory, Usage fault?

Can you please share any good links to read more about them in reference with ARM cortex m4 architecture?

Further, I have following code written in C running on cortex m4,

typedef struct {

  uint32_t nodeId;

  uint32_t systemId;

  int8_t serialNumber[16];

}sysConfig_t;

typedef struct {

  pktHeader_t pktHeader;

  uint8_t data[120];

}packet_t;

void *data;     //(this is pointer to array, i don't know exact alignment of this array )

packet_t *pkt = (uint8_t *)data;

sysConfig_t *sysData;

sysData = (sysConfig_t *)pkt->data;

printf(" %d %d ",sysData->nodeId, sysData->systemId);

I am getting Hard fault at printf statement. Why?

Can you please help?

According to me cortex m4 is based on arm v6 which supports handling unaligned addresses.

Can we discuss?

Thanks for reading my post.

Thanks

Hemant Undale.