Cortex M3 peripheral Bit Banding limit?

Is there an intrinsic limit to the width of the bit banding for peripherals for the

Cortex M3?

EFM32 Giant Gecko seems to have a limit of eight bits - bits 8 to 31 does not seem to work.

Is this normal?

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  • Hello shapeshifter,

    I am afraid you might be misunderstood.

    The bit banding area is so made that one bit is assigned into a word (i.e. 32 bit) address.

    Therefore you can handle a certain one bit by using 8 bit load or store instruction. The LSB of the 8 bit data of the LDRB/STRB will be valid.

    HTH,

    Yasuhiko Koumoto.

Reply
  • Hello shapeshifter,

    I am afraid you might be misunderstood.

    The bit banding area is so made that one bit is assigned into a word (i.e. 32 bit) address.

    Therefore you can handle a certain one bit by using 8 bit load or store instruction. The LSB of the 8 bit data of the LDRB/STRB will be valid.

    HTH,

    Yasuhiko Koumoto.

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