what is difference between Arm7 and Arm cortex-m series??
The two are quite different, though they can share code, if the code is written for this.
The name Cortex comes from Core and Texas
Arm7 (1994-2001) uses the Armv4T architecture, which supports two instruction sets: The old Arm instruction set and Thumb
Arm Cortex-M0 uses the Armv6-M (only supports 16-bit thumb instructions).
Arm Cortex-M3 and later uses the Armv7-M which supports the Thumb2 instruction set (16-bit + 32-bit instructions).
Apart from the instructions, there are other differences in the architecture.
For instance, the interrupt handling is different. On Cortex-M, you can write an interrupt routine directly in C like any other subroutine, without adding any special attribute keywords.
On Arm7, your compiler need to add a special prologue/epilogue.
The prologue/epilogue mainly saves and restores registers on the stack.
There are many other differences, which I cannot answer in detail; for this, you'll need an answer from an expert.
Personally, I find both architectures great.
There is no FIQ interrupt on Cortex-M, on the other hand, Interrupts are very easy on this one.
Thumb instructions are slightly limited from the older Arm instructions.
You cannot use LSR in a load or store instruction. This means you can't have an index in the top N bits of a register and use it directly. In such cases, you'll need an extra instruction to extract those bits.
You cannot subtract an index register from the base register in a load or store instruction.
There are some other limits as well.
-But most of the functionality exist in the Thumb2 instruction set, so normally you won't miss any features.
Hope this document helps:
We are using Cortex-M now.
Arm7 is still alive.
Please refer to "Arm Holdings PLC Reports Results For The Fourth Quarter And Full Year 2014"(Arm Holdings PLC Reports Results For The Fourth Quarter And… - Arm).
The 2nd big quantity of the shipment was Arm7.
It looks strange, because I would expect phones and tablets to contain a Cortex-A these days.
It's easy to be misguided by the statistics, to believe that the Cortex-M go into phones.
There are Cortex-A chips, which embeds Cortex-M; do you know if these count as both Cortex-A and Cortex-M?
yes,but chip production process has been lagging behind, and the cost is high.
Hi Chandan, You've got lots of good info from others, but for me, the main things that make Cortex-M so powerful are:
- Code can be written in C - yes, no startup or exception coding in assembler (exclusive accesses and some things might still need assembler!!)
- Single T2 state - so no interworking between Thumb and Arm
- Deterministic, fast exceptions - and potentially jitter-free exception timing
- Inclusion of NVIC means even less coding in assembler, and no code needed for "most' push / pop operations
- SLEEP - yes, real, fantastic, sleep and deep sleep, so the devices can clock gate or power down whilst the rest of the SoC is maintained - more options for lowering power...
(There are caveats and exceptions to the above of course, as there are several family members...)
Additionally you can choose the M core to match your needs:
- M0 / M0+ are simplest and lowest power
- M3 - offers higher performance, more functionality, T2 ISA...
- M4 - adds DSP and SP FP to the M3
- M7 - has an architecture that might look like a Cortex-R, but offers same key benefits above, but adds option of DP FP,c aches and TCMs, plus architectural options to massively increase performance.
All that said, Arm7 is still working hard in many applications and devices are still being designed in at the board level...
I like to think of Arm7 in raw DMIPS coming somewhere between M0 and M3.
The Cortex-M family has been hugely successful, and we've seen partners create over 2500 catalog parts from these - and they are only just getting started on M7 !
Hope that helps!
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