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What is the advantage of floating point of CM7 versus CM4

Hi all,

I did some of the investigation based on comparison of FPU based algorithms on CM4 and CM7 cores. All the code/data were placed into the single cycle memory with full utilization of modified / true Harvard architecture, it means:

- on CM4 - code in SRAM accesible via CODE bus, data in SRAM accesible via SYSTEM bus with fully utilized modified Harvard architecture

- on CM7 - code in I-TCM memory, data in DTCM memory

Most of the code (instructions) are floating point (99%), it means thay are not interleaved with integer instructions (well this is most probably caused by compiler - to be honest I have check the assembly for both codes CM4 / CM7 and they looked the same). The code mostly contains general math calculations mul, mac, sqrt, div + load / store, all in floating point. The result I am getting are confusing me. Cortex M4 shows even better results that Cortex M7.

Questions:

- are the differencies caused by cores pipelines? not sure how "dynamic branch prediction" works, if it is really posible to get branch in single cycle or it is required to flush whole pipeline (6 cycles) in a case of floating point pipeline on CM7 

- what are the best practices in coding to get the best from CM7 over CM4 in floating point meaning? (not sure if the compilers are now in best condition regarding to CM7)

thanks in advance.

regards

Rastislav

Parents
  • Hello Rastislav,

    I would like to know at what clock  frequency of each processor operates.

    If they are the same frequency, Cortex-M7 would be less performance than Cortex-M4 because of Cortex-M7's deeper pipeline.

    Best regards,

    Yasuhiko Koumoto.

Reply
  • Hello Rastislav,

    I would like to know at what clock  frequency of each processor operates.

    If they are the same frequency, Cortex-M7 would be less performance than Cortex-M4 because of Cortex-M7's deeper pipeline.

    Best regards,

    Yasuhiko Koumoto.

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