The reason why the exception frame forms on PSP?

Hello experts,


I would like to ask the reason why the exception frame forms on PSP in the Cortex-M architecture.
My understanding is that MSP (Main Stack Pointer) is the interrupt stack pointer and PSP (Porcess Stack Pointer) is the normal (user) stack pointer.
From my little experiences, the exception frame was formed on the interrupt stack.
However, the ARM forms it on the user stack.

Best regards,
Yasuhiko Kouoto.

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  • The saving is in not copying 16 words on every process switch or possibly more if using floating point.

    I had alook on the web and here's a description of what's done

    Context Switching on the Cortex-M3

    Suppose we are time-slicing between processes.

    When the timer interrupts the current process a stack frame is stored on the process stack instead of the interrupt stack. The stack frame will include any registers which are not callee save. That is r0-r3,r12,lr,pc and PSR

    The interrupt routine decides which process should get then next timeslice. It sets the PendSV interrupt to do the actual switch when the process stack is about to resume execution. This isn't very relevant but it is a mechanism to ensure the routine doing the switch has very low priority and will return to the process stack and that all the callee save registers are okay. The timer interrupt might be written in C but the PendSV interrupt would be written in assembler to have complete control over what happens with the registers.

    The processor will chain to the PendSV interrupt when just about to return to the process.

    In this routine what it has to do is store all the callee save registers of the old process and load up all the callee save registers of the new process. These are all the registers except r0..r3 etc. above. These can be saved on the process stacks or into a structure associated with the process. It saves the old process stack pointer into the structure associated with the old process. and loads the new process stack pointer from a structure associated with the new process.

    It then returns from the interrupt. This will automatically load all the registers which are callee save and continue execution in the new process.

    If the interrupt frame for the initial timer interrupt was stored on the interrupt stack then as well as what is done above that stack frame would have to be moved from the interrupt stack either to a structure associated with the old process or to the old process stack. It would then have to move the interrupt frame for the new process to overwrite where the interrupt frame of the old process was. Thus having the frame on the interrupt stack rather than the process stack means that two interrupt frames worth of data have to be moved for every process switch. Therefore another 16 words at least have to be moved. If the process uses floating point registers a lot more have to be moved.

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