The reason why the exception frame forms on PSP?

Hello experts,


I would like to ask the reason why the exception frame forms on PSP in the Cortex-M architecture.
My understanding is that MSP (Main Stack Pointer) is the interrupt stack pointer and PSP (Porcess Stack Pointer) is the normal (user) stack pointer.
From my little experiences, the exception frame was formed on the interrupt stack.
However, the ARM forms it on the user stack.

Best regards,
Yasuhiko Kouoto.

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  • Hello daith,

    thank you again for the detailed explanations.

    I have a question.

    When a context switching, all registers should be saved to some memory area, but the context on PSP is r0-r3, r12, r14, r15 and xPSR. From where do the other registers bring?

    I'm sorry if you had already explained it.

    Best regards,

    Yasuhiko Koumoto.

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  • Hello daith,

    thank you again for the detailed explanations.

    I have a question.

    When a context switching, all registers should be saved to some memory area, but the context on PSP is r0-r3, r12, r14, r15 and xPSR. From where do the other registers bring?

    I'm sorry if you had already explained it.

    Best regards,

    Yasuhiko Koumoto.

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