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Cortex-M3: Booting to image in NVM, then performing DDR Remap & handoff execution

Hi,

I have a question about booting to multiple images in a Cortex-M3 on a Microsemi SoC.

Say I have two images: Image 1 is at the base of NVM, and by default that is what the Cortex-M3 in the Microsemi SoC boots to.  Image 2 is also in NVM at a defined offset.

On reset, the scenario is it runs Image 1, starting with the CMSIS startup scripts/code that came with the toolchain, and next it runs the main function in Image 1. Then at some point, a decision is made to switch to Image 2, in which I will implement a function that copies Image 2 from NVM to DDR, then the code jumps to DDR at the address of the reset handler of Image 2, never to return to Image 1 unless it is reset.

Now the main question: Does Image 2 need the same or similar startup code? Or does the startup code from Image 1 persist (interrupt setups, GPIOs, etc)?  I think the answer is no you have to re-run startup, but I'd like to gain a good understanding of the answer.

Thanks.