CLZ

I have never been too clear on the usability of the IT instruction. On the M0 especially, a branch takes 3 cycles whereas good old fashioned 32-bit ARM used condition codes so:

MOVS R1,#32

ITNZ 1100
LSRS R2,R0,#16
SUBS R1,R1,#16
MOV R0,R2
NOP   <---can the 4th IT instruction be another IT?

If so, rather than taking 5 or 6 cycles, it would take 4 (or 5 if ITs cannot be nested).


I've only just got around looking at the IT instruction because it looked... odd.


But I have to admit, Thumb is an odd, odd language.