Cortex-M3 DA addressing not allowed for STM

Because it is not supported in Armv7-M!
A8.8.203   STMIB (STMFA)
Store Multiple Increment Before (Store Multiple Full Ascending) stores multiple registers to consecutive memory
locations using an address from a base register. The consecutive memory locations start just above this address, and
the address of the last of those locations can optionally be written back to the base register.
For details of related system instructions see STM (User registers) on page B9-1994.
For the case when cond is 0b1111, see Unconditional instructions on page A5-214.
n = UInt(Rn);  registers = register_list;  wback = (W == ‘1’);
if n == 15 || BitCount(registers) < 1 then UNPREDICTABLE;
Encoding A1 ARMv4*, ARMv5T*, ARMv6*, ARMv7

Because it is not supported in Armv7-M!
A8.8.203   STMIB (STMFA)
Store Multiple Increment Before (Store Multiple Full Ascending) stores multiple registers to consecutive memory
locations using an address from a base register. The consecutive memory locations start just above this address, and
the address of the last of those locations can optionally be written back to the base register.
For details of related system instructions see STM (User registers) on page B9-1994.
For the case when cond is 0b1111, see Unconditional instructions on page A5-214.
n = UInt(Rn);  registers = register_list;  wback = (W == ‘1’);
if n == 15 || BitCount(registers) < 1 then UNPREDICTABLE;
Encoding A1 ARMv4*, ARMv5T*, ARMv6*, ARMv7