Hi, Am I correct in thinking that the only the ADCS & SBCS can use C flag? Shifts/Rotate does not use C, as I understand it. Earlier tonight I was gutted because I thought I had found a 15-cycle 32-bit x 32-bit --> 64-bit multiply macro that took 15 cycles (not the 18 my codes used & the 17 cycles of Jens Bauer's method).I ask because I have noted that the documentation of some instructions are given different explanation depending on source. I have to place C into bit 16 of a register and I thought I could use a RORS, but evidently RORS doen't use the value in C as an input, only an output. Very annoying because I thought I had worked out a 15 cycle multiply.Anyone wanting an MP3 or WB-ACELP decoder to run on an M0+ will have fun.
My version needs also 17, and I doubt it can be done with less cycles.
I have been considering the fact that when a register is shifted by the value in another register uses bits 0-7 as the shift/rotate value and specifically rotating a register by the value IN that register e.g.RORS Rd,Rd,RdSome shifts are 0-31, others 1-32 so I can imagine 6 bits being used, but 8? I know from experience that Sophie Wilson never explained what she thought was obvious. Since you can only ADD from HI Registers, If I need to subtract, I NEGS them before moving to hi regs. Obviously I stack LR but if I am writing code that runs in NMI, I store SP to memory.It WOULD be nice if the 2 SPs could be freely swapped.
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