Hi Team,
I would like to check the SCB_ICSR register, the content of 'Cortex-M4 Devices Generic User Guide' makes me confused.
According to the document DUI0553B, this figure shows the VECTORPENDING bit is [21:12]. But the Table 4-15 shows that only [17:12] is available while others are reserved.
May I know which one is correct? Thanks.
If you check other TRMs, you should consider it a typo.
Max. number of interrupts is limited to 240 for any Cortex-M (at least v7-M) I know off.