I am studying the Cortex-M3 technical reference manual.
I have some doubts:- What is the function of each of the 13 general purpose 32-bit registers, R0 to R12?- What does Link Register (LR) do?- What is the function of the xPSR register?- What does the DebugReturnAdress() register do?- What is the function of CONTROL, FAULTMASK, BASEPRI, PRIMASK of register 5b10100?
Thank you in advance!
Thank you very much for the support, clarified many of my doubts.
In the memento I loaded a binary (firmware) in RAM via SWD and I would like to run it, however, I don't know how to do it. My question is not related to the SWD protocol and how to access the Cortex-M3 registers. My question is related to what steps should I follow to execute this binary that is in RAM.
Is there any step-by-step manipulation of the Cortex-M3 registers to execute this firmware present in RAM?
Thank you very much and I look forward to your reply.
Please stick to 1 question per thread.
Perhaps you should study this: http://www2.keil.com/mdk5/learn
That's a new question - start a new thread!
Okay I started a new discussion. Follow the link: https://community.arm.com/developer/ip-products/processors/f/cortex-m-forum/46748/cortex-m3-registers
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