I am trying to find the location of the register where the timestamp generator can be enabled on a Cortex-M4 processor.
In the CoreSight SoC Technical Reference Manual on page 3-210 it is mentioned that the register (CNTCR) is in the PSELCTRL region (see image). However, I am not able to find the base memory address of this PSELCTRL region.
Can I find this address somewhere the ROM table that indicates the implemented debug components? But then how do I know which ID it is?
Or is it defined in some datasheet?
Thank you for any help.