Is here any detail information or integration guide？
how to realise the compare logic ，only to compare the CM7 core interface？
I doubt that CM7 is prepared for Lockstep. But you may prove me wrong.
Cortex-M7 has a parameter named LOCKSTEP to configure whether the implementation is a dual-redundant core.
It is related to functional safety requirements in certain types of microcontrollers/SoC for automotives and industrial applications. This allows logic failures to be detected, which enables safety features to kick in and start remedy actions.
The link below is a paper published in Embedded World 2015, which covered this topic: community.arm.com/.../embedded-world-2015---design-of-soc-for-high-reliability-systems-with-embedded-processors
Thanks,
Uma