hi
I have executed a cmsis dsp absolute function on cortex m7 (arm_abs_q7) and obtained the states as 860 ( as it indicates approximated cycle count). when i re-run the same function, i get the varying states.why is it so. i am using simulator mode for debug, where memory is not accessed. to access the memory i have used the following kernel code to enable DWT register
uint32_t clock_cycles_counter; volatile unsigned int *DWT_CYCCNT = (uint32_t *)0xE0001004; //address of the register volatile unsigned int *DWT_CONTROL = (uint32_t *)0xE0001000; //address of the register volatile unsigned int *SCB_DEMCR = (uint32_t *)0xE000EDFC; //address of the register [...] // configure and start the clock cycles counter clock_cycles_counter = 0; *SCB_DEMCR = *SCB_DEMCR | 0x01000000; *DWT_CYCCNT = 0; *DWT_CONTROL |= 1; // do something algorithm(); // stop and get the counter value *DWT_CONTROL &= ~1; clock_cycles_counter = *DWT_CYCCNT; // print the counter value printf("%d\n\r", clock_cycles_counter);
please suggest
What do you mean by "states"?
Cycle counts?
Anyway, regarding caches, ask yourself, what these are good for. And also, check the other performance counters in the CM7.
See also "C1.8.4 Profiling counter support" in the DDI0403E(d) document.