Current priority level of processor

Hi,

I have been reading about the exception mechanism of Cortex-M (M4 to be precise). The exception request is accepted by the processor if the current priority level of the processor is less than the incoming exception (this is one of the conditions to accept the request). So I am a bit confused about what is meant by 'Current priority level of processor'. I can guess that when the processor is in handler mode, it will be the priority level of that exception. But when the processor is in thread mode, say just running a normal user program after reset, what is the priority level of the processor?

Thanks,

Gopal

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  • Hi Gopal,

    If it is in thread mode, and if none of the interrupt masking registers (e.g. PRIMASK, FAULTMASK, BASEPRI) is set, we call this a base level.

    The architecture implies that in this state the priority level is 256.

    If you have the ARMv7-M Architecture Reference Manual (issue D), please see section B1.5.4, page B1-639.

    Hope this helps.

    regards,

    Joseph

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  • Hi Gopal,

    If it is in thread mode, and if none of the interrupt masking registers (e.g. PRIMASK, FAULTMASK, BASEPRI) is set, we call this a base level.

    The architecture implies that in this state the priority level is 256.

    If you have the ARMv7-M Architecture Reference Manual (issue D), please see section B1.5.4, page B1-639.

    Hope this helps.

    regards,

    Joseph

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