The spec mentions that the M0 will generate a Hardfault when unaligned accesses are detected. I would like to find out where is this implemented in RTL and understand it a little better.
Does the GCC compiler detects unaligned code accesses during compilation as well?
Thanks guys, that's gives me an idea where to start if I need to pursue this further.
I typically work on the RTL end of the MCU, so I'm trying to understand how the firmware and hardware work together with respect to unaligned/aligned memory accesses.