I would like to use the the number of oscillator periods for each instruction in delay calculations for instructions like NOP etc.
When they say frequencies for the processor that is one cycle for every processor cycle. Typically for M series chips they have a phased locked loop driving the CPU and use either an external or internal oscillator which can have a much lower frequency than the CPU.
Correct me if I'm wrong daith, but using the crystal and NOP for delays is not really a good practice.
I think it'd be simpler, more portable, and less error prone to use a timer for that...
If for a reason or another (like having to change the XTAL, or clock speed because of some peripheral needs something else) you change the master clock, the last thing a developer wants is having to go through all the code to tweak NOPs...
Instruction cycle timing information can be found in Chapter 18 of the Cortex-M3 Technical Reference Manual. But note very carefully the wording in section 18.1 about the effect which the system architecture plays in this.
That means that Alban is right (as usual!). You are much better advised to use a timer, like the standard SysTick timer, for timing delays on a Cortex-M3. The execution time of individual instructions is not only dependent on the individual processor implementation (so, for instance, it might be different in a Cortex-M4) but also on memory latency. Memory latency will vary, sometimes considerably, from device to device.
Hope this helps.
Chris
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