Could you help me to solve the problem.Do you have the code to verify the thumb instruction ? If have,the code can check any corner the functions of thumb instructions
the memory and flash of bad chip is good , We have tested them. We have tested CM0 logic by DFT, but is ok. Only the instructions (SUBS R2,R2,R4 ) is wrong, no matter the SUBS in SRAM or FLash
Is this a timing path issue? Does it fail when running at lower frequency?
In general we expected DFT to pick up this kind of issues. There are some limitations with DFT, for example, timing violations might not be picked up by DFT because scan clock usually run slower, and defects could be hidden as clock signal's characteristic could be very different in scan mode. But test coverage of software tests are usually much lower than DFT. In general, DFT is the recommended test method.
regards,
Joseph
This is a timing issue, when it runs at lower frequency,the result of SUBS R2,R2,R4 is correct.So we want to pick up those bad chips by running code. But how to pick up?
Can you do at-speed test with scan chains?
Never do this before,How to do at-speed test with scan chins?
It is similar to normal DFT scan test, but the capture cycle (gap between last shift to capture clock edge) is using normal clock speed.
https://www.eetimes.com/document.asp?doc_id=1217753
Thank you very much!