Hi,
I trying to build the peripheral around Cortex-M0 IP core thorugh AHB-lite system. Right now I have to integrate Cortex-M0 with the DDR2 SRAM (1Gb) through AHB lite.
I searched on internet which shows interfacing only through core generator (MIG). Is there a way I can use Xilinx core generator to interface through AHB lite system.
I am using Atlys Xilinx Spartan 6.
I also have some example SoC design which interface 128Mb SRAM to Cortex-M0 though AHB lite for Nexsys 3 board . But the Board I am using has DDR2 RAM.
Thanks
i) See Xilinx datasheet
http://www.xilinx.com/support/documentation/data_sheets/ds160.pdf
However, please note that even LX45 got 2088Kbits (256Kbytes) of memory, it doesn't necessary means you can fully utilize that in your project.
(e.g. place and routing limitations)
You need to do some homework to test it yourself.
ii) Yes, that's why it is not free.
iii) The full CMSDK product require licensing. But if you buy the Cortex-M Prototyping System (FPGA board), it included a subset of the CMSDK include AHB to external SRAM interface (also work with PSRAM).
iv) They have application note:
http://www.wiki.xilinx.com/Zynq+XADC+to+PS+App+Note
regards,
Joseph