cortex-m3 pipeline stages, branch prediction

Hello,

Doing some research for master thesis, I've read several documents about ARMv7-M / Cortex-M3 includung reference manuals and books such as Joseph Yiu's "Definitive Guide to Cortex-M3" and Trevor Martin's "Designer's Guide ti Cortex-M Processor Family".

In all that literature I could often read the terms 3-stage pipeline and branch prediction / branch target forwarding / speculative branch target fetch, but the documents don't give further information.

I'm interested in the functional principle of the branch related unit(s) and the structure of the particular pipeline stages. Is there any information accessible regarding those architectural components?

Thanks in advance.