Hi Andy,
There is a newer edition of this book:
http://www.amazon.com/Definitive-Cortex%C2%AE-M3-Cortex%C2%AE-M4-Processors-Edition/dp/0124080820/
(availble in Kindle too)
regards,
Joseph
There does seem to be a Kindle version listed now:
http://www.amazon.com/Definitive-Guide-Cortex-M3-Second-Edition/dp/185617963X/ref=sr_1_1?ie=UTF8&qid=1394798268&sr=8-1&keywords=The+Definitive+Guide+to+the+ARM+Cortex-M3
The Definitive Guide to the ARM Cortex-M3: Amazon.co.uk: Joseph Yiu: Books
Joseph - do you know why there is not a Kindle version of the new edition of your book?I thought Newnes was a little more "on the ball" (or maybe it's an Amazon issue?)Thanks!
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Yes, it if possible to have a mid-priority level SVC so that an OS aware IRQ handler can use the SVC function. But instead of using SVC, you might able to call the SVC function directly rather than using SVC exception.
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