Arm Community
Site
Search
User
Site
Search
User
Groups
Arm Research
DesignStart
Education Hub
Graphics and Gaming
High Performance Computing
Innovation
Multimedia
Open Source Software and Platforms
Physical
Processors
Security
System
Software Tools
TrustZone for Armv8-M
中文社区
Blog
Announcements
Artificial Intelligence
Automotive
Healthcare
HPC
Infrastructure
Innovation
Internet of Things
Machine Learning
Mobile
Smart Homes
Wearables
Forums
All developer forums
IP Product forums
Tool & Software forums
Support
Open a support case
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
Community Help
More
Cancel
Developer Community
IP Products
Processors
Jump...
Cancel
Processors
Cortex-M / M-Profile forum
Question : The Definitive Guide to the ARM Cortex-M3
Blogs
Forums
Videos & Files
Help
Jump...
Cancel
New
State
Not Answered
Replies
33 replies
Subscribers
6 subscribers
Views
15050 views
Users
0 members are here
Cortex-M3
Cortex-M
Related
Question : The Definitive Guide to the ARM Cortex-M3
Offline
Kenichi Kenichi
over 7 years ago
Note: This was originally posted on 11th December 2007 at
http://forums.arm.com
Dear, all.
I am new in this forum.
Recently I studying Cortex-M3 core, so I bought book "The Definitive Guide to the ARM Cortex-M3" by Joseph Yiu.
This book is very good book and this explains most of unaswered questions by TRM or AALRM.
As I found some mistake in this book, I would like to feedback, but I could not find publisher's homepage. Then I found Josephe's name in this forum, I would like to ask here.
In page 42, there is fig 3.11 and 3.12 but this contents is same as fig 3.8 and 3.9.
Fig 3.8 and 3.9 should be some program list.
Can I get correct figure? Or where I should contact?
Please advise.
Kenichi
Parents
0
Offline
David Clark
over 7 years ago
Note: This was originally posted on 10th April 2010 at
http://forums.arm.com
Joseph -
Question about the new IF-THEN construct. Basically, I don't understand the advantage of it over the previous "conditional execution" model that I was so fond of.
It seems that the 2nd edition of the book gives it a little more treatment, which is good, but I'm still not sold on it.
I have 2 problems with it. To illustrate, I'll use the example from the 2nd ed. of the book, table 4.33
OLD ARM CODE WITH CONDITIONAL EXECUTION:
[font="Courier New"]
CMP R1, #2
ADDEQ R0, R1, #1
[/font]
NEW CODE WITH IF-THEN:
[font="Courier New"]CMP R1, #2
IT EQ
ADDEQ R0, R1, #1[/font]
Forgive me for being cynical, but what I see is:
(1) More code (3 instructions vs. 2). This is not good for 2 reasons:
- longer execution time (* maybe it's not, I'm not up to speed)
- more code to maintain (3 source lines vs. 2)
(2) Potential for inconsistency. Isn't the EQ suffix on the ADD redundant? The way I read "IT EQ" is "If EQ evaluates to TRUE, THEN execute the next 1 instruction, otherwise don't." So WHY do we need the EQ suffix on ADD?!?!? Put another way, what would happen with the following code, would the assembler just spit out an error?
[font="Courier New"]CMP R1, #2
IT EQ
ADDNE R0, R1, #1[/font]
So in other words, the conditional suffix doesn't match up with the ITEQ. This situation cannot happen with the old syntax.
I will admit I haven't spent lots of time understanding the construct, but IF-THEN seems like a step backwards in code maintainability, and at best a wash when it comes to performance. Actually it seems like the performance would be worse. The engineers I've worked with ARM are smart, so clearly I'm missing something (I'm being serious). Sorry if these issues are addressed in the book, I don't have it handy & I wanted to send this off before I forget.
Please help sell me on the IF-THEN construct!
Thanks.
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Reply
0
Offline
David Clark
over 7 years ago
Note: This was originally posted on 10th April 2010 at
http://forums.arm.com
Joseph -
Question about the new IF-THEN construct. Basically, I don't understand the advantage of it over the previous "conditional execution" model that I was so fond of.
It seems that the 2nd edition of the book gives it a little more treatment, which is good, but I'm still not sold on it.
I have 2 problems with it. To illustrate, I'll use the example from the 2nd ed. of the book, table 4.33
OLD ARM CODE WITH CONDITIONAL EXECUTION:
[font="Courier New"]
CMP R1, #2
ADDEQ R0, R1, #1
[/font]
NEW CODE WITH IF-THEN:
[font="Courier New"]CMP R1, #2
IT EQ
ADDEQ R0, R1, #1[/font]
Forgive me for being cynical, but what I see is:
(1) More code (3 instructions vs. 2). This is not good for 2 reasons:
- longer execution time (* maybe it's not, I'm not up to speed)
- more code to maintain (3 source lines vs. 2)
(2) Potential for inconsistency. Isn't the EQ suffix on the ADD redundant? The way I read "IT EQ" is "If EQ evaluates to TRUE, THEN execute the next 1 instruction, otherwise don't." So WHY do we need the EQ suffix on ADD?!?!? Put another way, what would happen with the following code, would the assembler just spit out an error?
[font="Courier New"]CMP R1, #2
IT EQ
ADDNE R0, R1, #1[/font]
So in other words, the conditional suffix doesn't match up with the ITEQ. This situation cannot happen with the old syntax.
I will admit I haven't spent lots of time understanding the construct, but IF-THEN seems like a step backwards in code maintainability, and at best a wash when it comes to performance. Actually it seems like the performance would be worse. The engineers I've worked with ARM are smart, so clearly I'm missing something (I'm being serious). Sorry if these issues are addressed in the book, I don't have it handy & I wanted to send this off before I forget.
Please help sell me on the IF-THEN construct!
Thanks.
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Children
No data
More questions in this forum
By title
By date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions
Unread questions
Questions you've participated in
Questions you've asked
Unanswered questions
Answered questions
Questions with suggested answers
Questions with no replies
Not Answered
Compiling libgcc not optimized
0
32-bit
Armv7-M
Compiling
GCC
Thumb
Cortex-M
Thumb2
Library
Arm Assembly Language (ASM)
C
Cortex-M4
2255
views
11
replies
Latest
3 months ago
by
a.surati
Not Answered
How to specify RAM location ?
0
SRAM
STM32 F1
Arm Assembly Language (ASM)
641
views
1
reply
Latest
3 months ago
by
GuillaumeP
Answered
Is it possible to enable or disable the nested interrupt mechanism on M0 ?
0
672
views
2
replies
Latest
3 months ago
by
Robert McNamara
Answered
How long are the Cortex-M7 pipeline stages?
0
Cortex-M7
Cortex-M
30834
views
18
replies
Latest
3 months ago
by
Pacocha
Not Answered
How to transfer and read weights, biases and activation functions from trained tensorflow model to nucleo-f446re or any microcontroller in keil
0
Embedded
Neural Network
Keil
TensorFlow
CMSIS
399
views
0
replies
Started
3 months ago
by
PrashanthPoobalan
<
>
View all questions in Cortex-M / M-Profile forum