Arm Community
Site
Search
User
Site
Search
User
Groups
Arm Research
DesignStart
Education Hub
Graphics and Gaming
High Performance Computing
Innovation
Multimedia
Open Source Software and Platforms
Physical
Processors
Security
System
Software Tools
TrustZone for Armv8-M
中文社区
Blog
Announcements
Artificial Intelligence
Automotive
Healthcare
HPC
Infrastructure
Innovation
Internet of Things
Machine Learning
Mobile
Smart Homes
Wearables
Forums
All developer forums
IP Product forums
Tool & Software forums
Support
Open a support case
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
Community Help
More
Cancel
Developer Community
IP Products
Processors
Jump...
Cancel
Processors
Cortex-M / M-Profile forum
hard fault with Cortex M1
Blogs
Forums
Videos & Files
Help
Jump...
Cancel
New
State
Not Answered
Replies
10 replies
Subscribers
6 subscribers
Views
7702 views
Users
0 members are here
Cortex-M1
Cortex-M
firmware
Related
hard fault with Cortex M1
Offline
sumit sumit
over 7 years ago
Note: This was originally posted on 24th December 2008 at
http://forums.arm.com
Hi all,
I am developing firmware on Cortex M1 on Actel fusion FPGA.I have built the design that has sram at 0x0 location ,size is 1mb and I use it as my program memory.I have Ethernet interface and I want to debug the driver for the ipcore.
I am facing the problem due to hard fault.When I start the transmission on the Ethernet,after transmission first frame the cortex goes to hard fault.
Would anyone tell me what may be the reason for hard fault? How to overcome?
I am completely new to arm environment.
regards,
Sumit
Parents
0
Offline
guestposter guestposter
over 7 years ago
Note: This was originally posted on 8th January 2009 at
http://forums.arm.com
Would it be an exception handler corrupted the stacked memory, and hence affect the register's content after exception return? When the interrupt program is resumed after the interrupt handler, the memory pointer became invalid and might cause unaligned transfer. You can try setup some variables to trace what exception handlers has been running before the fault, and see if the exception handler has any operations that can corrupt the stack (e.g. data array in local variables with unbounded index).
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Reply
0
Offline
guestposter guestposter
over 7 years ago
Note: This was originally posted on 8th January 2009 at
http://forums.arm.com
Would it be an exception handler corrupted the stacked memory, and hence affect the register's content after exception return? When the interrupt program is resumed after the interrupt handler, the memory pointer became invalid and might cause unaligned transfer. You can try setup some variables to trace what exception handlers has been running before the fault, and see if the exception handler has any operations that can corrupt the stack (e.g. data array in local variables with unbounded index).
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Children
No data
More questions in this forum
By title
By date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions
Unread questions
Questions you've participated in
Questions you've asked
Unanswered questions
Answered questions
Questions with suggested answers
Questions with no replies
Not Answered
Using STM32H7 ETM without external tool
0
CoreSight ETM7
STM32
331
views
0
replies
Started
3 months ago
by
GuillaumeP
Not Answered
How to realise Real-time detection of access of memory beyond the bounds of an allocation block, instead of period detection in Cortex-M4. Please give me any idea.
0
Cortex-M4
1052
views
3
replies
Latest
3 months ago
by
42Bastian Schick
Not Answered
Getting Dummy character while receiving UART data,How to fix it ?
0
732
views
2
replies
Latest
3 months ago
by
Jerome Decamps - 杜尚杰
Not Answered
Timer not working in stm32f401re
0
Keil MDK Cortex-M Edition
STM32
Cortex-M
STM32 F4
618
views
1
reply
Latest
3 months ago
by
42Bastian Schick
Not Answered
Is there an FPGA image for the MPS2+AN521 with an FPU?
0
Cortex-M33
Cortex-M Prototyping System (V2M-MPS2)
343
views
0
replies
Started
3 months ago
by
erickroane
<
>
View all questions in Cortex-M / M-Profile forum