Arm Community
Site
Search
User
Site
Search
User
Groups
Arm Research
DesignStart
Education Hub
Graphics and Gaming
High Performance Computing
Innovation
Multimedia
Open Source Software and Platforms
Physical
Processors
Security
System
Software Tools
TrustZone for Armv8-M
中文社区
Blog
Announcements
Artificial Intelligence
Automotive
Healthcare
HPC
Infrastructure
Innovation
Internet of Things
Machine Learning
Mobile
Smart Homes
Wearables
Forums
All developer forums
IP Product forums
Tool & Software forums
Support
Open a support case
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
Community Help
More
Cancel
Developer Community
IP Products
Processors
Jump...
Cancel
Processors
Cortex-M / M-Profile forum
Loading instruction set
Blogs
Forums
Videos & Files
Help
Jump...
Cancel
New
State
Not Answered
Replies
2 replies
Subscribers
6 subscribers
Views
2260 views
Users
0 members are here
Cortex-M1
FPGA
Address
Cortex-M
Related
Loading instruction set
Offline
chaitanya chaitanya
over 7 years ago
Note: This was originally posted on 7th October 2008 at
http://forums.arm.com
HI,
I am trying out the Cortex M1 on an altera FPGA. I have an example implementation from the Altera kit which uses ITCM to load the software files on the ARM. I want to instead load the software from external Flash or SRAM. I have made the required hardware and software changes and when I single step the system in emulation mode, it runs a few lines and jumps to 0xfffffffe, which is a hard fault location. The flash is off-chip and sitting on a tri-state bridge, the address location for the flash starts at 0x0 and the size is 0x1000000, so I know that flash is within the first 0.5GB of ARM's address space. Any suggestions why the arm is hitting hard fault.
Thank You
Chaitanya
More questions in this forum
By title
By date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions
Unread questions
Questions you've participated in
Questions you've asked
Unanswered questions
Answered questions
Questions with suggested answers
Questions with no replies
Not Answered
Compiling libgcc not optimized
0
32-bit
Armv7-M
Compiling
GCC
Thumb
Cortex-M
Thumb2
Library
Arm Assembly Language (ASM)
C
Cortex-M4
2255
views
11
replies
Latest
3 months ago
by
a.surati
Not Answered
How to specify RAM location ?
0
SRAM
STM32 F1
Arm Assembly Language (ASM)
641
views
1
reply
Latest
3 months ago
by
GuillaumeP
Answered
Is it possible to enable or disable the nested interrupt mechanism on M0 ?
0
672
views
2
replies
Latest
3 months ago
by
Robert McNamara
Answered
How long are the Cortex-M7 pipeline stages?
0
Cortex-M7
Cortex-M
30836
views
18
replies
Latest
3 months ago
by
Pacocha
Not Answered
How to transfer and read weights, biases and activation functions from trained tensorflow model to nucleo-f446re or any microcontroller in keil
0
Embedded
Neural Network
Keil
TensorFlow
CMSIS
399
views
0
replies
Started
3 months ago
by
PrashanthPoobalan
<
>
View all questions in Cortex-M / M-Profile forum