I'm testing a Digilent Arty devboard (containing an Artix 7 FPGA) in order to evaluate the usage of the M1 ip core. I'm following the documents/example project offered by Diligent and the video tutorial "Arm Cortex-M DesignStart FPGA getting started" offered by ARM. My setup is pretty close but not identical since I'm using a JLINK debugger.
What does work:Pretty much everything including debugging the M1 core via Keil uVision.
What does not work:When I upload my created bitstream the application does not start (reset button does not help). When I connect the jLink debugger now and manually start the application, the system runs as expected, e.g. sending a message via UART and flashing some LEDs when pressing buttons. If I press the boards reset button at this point, the system resets but works as expected. So it behaves like its need a kickstart from the debugger and works fine afterwards which really confuses me.
Maybe somebody can point me in the right direction?
Is the reset vector (address 4) setup correctly?
When you connect via JLink, at which address is the PC?
thank you for your reply, this may be the right direction altough I still dont get what I'm missing. When I connect the debugger after I programmed the FPGA via Vivado (without issuing a hardware reset during connect via Keil uVision):
SP: 0x20000308PC: 0xFFFFFFFEAddress 4: 0x000304011uVisions memory viewer shows data which I cannot see in my hex file.
When I connect the debugger executing a hardware reset via Keil uVision:
SP: 0x20000E08PC: 0x000001C0Address 4: 0x000001C1
The map file shows that the Reset_Handler is located at 0x1C1.
Edit:I think I made some error during my synthesis. When I merge the original bitstream (delivered by Digilent) and my hex file everything works as expected... So I made the good old too-many-steps-in-one-go mistake.
Thank you very much for your time.