Hi
i'm using Nucleo board F401RE.
i want to access to ETM with code.
i'm using IAR Embedded Workbench
My code:
#define ETM_CR 0xE0041000 // Address of ETM_CR
#define ETM_LAR 0xE0041FB0 // Address of ETM_LAR
#define UNLOCK 0xC5ACCE55 // Value to unlock the ETM
int main (void)
{
unsigned int *pointer_1 = (unsigned int *) ETM_LAR; // The pointer_1 will point to the address contained in the variable ETM_LAR *pointer_1 = UNLOCK; // Cheque UNLOCK to the contents of the memory address ETM_LAR
unsigned int *pointer_2 = (unsigned int *) ETM_CR; // The pointer_2 will point to the address contained in the variable ETM_CR
unsigned int var = 0x0; // I initialize a variable called var
var = *pointer_1; // I assign the contents of pointer_1 to the variable var
while (1) { printf("Il contenuto in esadecimale è: %p\n", *pointer_1); // I expect to see on the terminal the value of UNLOCK }
}
Hi Lorenzo,
Whilst the Cortex-M3 TRM shows ETMLAR to be WR, the CoreSight Architecture spec says this register is WO. When I try to read that register in a Cortex-M4 (sorry I dont have an M3 handy) I get 0. I would suggest you read the ETMLSR (located at 0xE0041FB4) to indicate the success of you unlocking the registers.
Using the ArmDS Debugger on my Cortex-M4:
x/w 0xE0041FB40xE0041FB4: 0x00000003memory set 0xE0041FB0 32 0xC5ACCE55x/w 0xE0041FB40xE0041FB4: 0x00000001
The change of bit 1 of 0xE0041FB4 from 1 -> 0 shows that the registers are now accessible.
Does that help?
Regards Tony
Hi Tony and thanks for the reply
My board is Cortex M4
View all questions in Cortex-M / M-Profile forum