Respected Experts,

                              I would like to know that is it possible to get the advantage of Hardware Asssited Virtualization to develop a Type 2 Hypervisor which runs on …

All,

When I am using the cycle counter in AArch64, I am not getting cycles properly. I have enabled read of pmccntr_el0 in user space using a small kernel module. I have sample code like:

asm volatile("isb;mrs %0, pmccntr_el0" : "=r"(prev));

    sleep…

Hi, all

When I was porting Minix 3 OS to Zedboard (Zynq 7000 All Programmable SoC) the system always hanged

at refresh_tlb. What's strange is that refresh_tlb had been performed at KERNEL booting up, but when a user

space process VM (for Virtual Memory…