• How should I do if I want to enable only one single CPU on a Cortex A9 MPCore(2 CPUs)

    Hi, all

    When I was porting Minix 3 OS to Zedboard (Zynq 7000 All Programmable SoC) the system always hanged

    at refresh_tlb. What's strange is that refresh_tlb had been performed at KERNEL booting up, but when a user

    space process VM (for Virtual Memory…

  • Getting processor and cache details

    I work on software that needs to know the processor and cache details. On x86 systems it uses the CPUID instruction to know about the processor family/model (Skylake, Icelake etc) and cache details (total size, line size, associativity etc). I am trying…

  • ARM Cortex A9 flush cache

    I'm measuring worst case execution time of an application. I would like to flush L1, L2 (Instruction and Data) cache and then begin my measurements.

    Is it doable from user mode?

    Processor: ARM Cortex A9

    OS: Linaro Linux