• Address Space Identifier - ASID

    For ARMv7 -A/R systems, the MMU uses an ASID to distinguish between memory pages which have the same virtual address, but which are used by an individual task ( I.e. A task which uses non-Global memory). The ASID is an eight-bit value, from 0-255, assigned…

  • ARM Cortex A9 flush cache

    I'm measuring worst case execution time of an application. I would like to flush L1, L2 (Instruction and Data) cache and then begin my measurements.

    Is it doable from user mode?

    Processor: ARM Cortex A9

    OS: Linaro Linux

  • ARMv7 "write buffer" issue

    Note: This was originally posted on 3rd July 2012 at http://forums.arm.com

    Hi All,

    I have a question about the "write buffer" for ARMv7 processor.

    Write buffer is explicitly described in TRM(tech reference manual) prior to ARMv6. E.g, how to enable…