• How Can I jump from EL1 to EL0 in bare metal environment

    Hello,

    I am working with a port of FreeRTOS on Arm64 soc , which is running at EL1, my goal is to perform a function call that will execute in EL0,

    I have come to understand that the only way for the EL switch is to set the correct M bits of the spsr_el1…

  • Permission fault, level 2 on MMU enable

    Hi ARM folks, hoping someone can show me where I'm going wrong programming the MMU. The ESR_EL1 reports that it is a Permission fault, level 2. Here's what I'm trying to accomplish:

    4GiB space, 4kiB granule flat identity mapped, divided like…

  • What are the necessary preconditions to load a guest into EL1 from EL2?

    I have successfully moved from EL3 to EL2. After doing some initialization I am trying to move from EL2 into EL1 with a very simple guest image. My process looks like:

    • Map EL1 memory into EL2
    • Copy EL1 image to RAM
    • Initialize sctlr_el1 = 0x30d00800
      …

    • how to return from exception generated by SMC instruction

      Hi,

      I am experimenting execution level switching on A53. I go from EL3->El2, then call SMC instruction to return to EL3. As soon as SMC instruction is executed, the processor enters EL3 mode and an exception is generated.

      I have written an exception…

    • how to understand ARMv8 exception level1 secure/non-secure MMU?

      Hi Experts,

           ARMv8 MMU TTBRn_ELx registers are banked by exception level.

           In "DDI0487A_b_armv8_arm.pdf" page 1640, the controlling register of secure EL1&0 stage1 is TTBR0_EL1

           and Non-secure…

    • ARMv8 Secure EL1 problem

      Hi, arm experts,

      We want to use ARCH32 mode in secure EL1, I see some descriptions in ARMv8 Arch Reference Manual about Secure EL1 ARCH32 mode as follows:

      One is the VBAR(secure), it is mapped to  VBAR_EL3, the other is SCTLR (secure), it is mapped to …