• page table Cachability bit effect!

    Hi experts,

    I really get confused with the page table cachability bit (c bit) effect (Cortex-A8) and need your help to find answer of my question. The questions is whether page table C-bit only controls writing/updating into the cache(inner or outer) lines…

  • Cache and store buffer maintenance in cortex-a8!

    Dear All,

    Technical data sheets for the ARM7500FE  and ARM7100 say that:

    "In the ARM Processor the cache will be searched regardless of the state of the C bit, only reads that miss the cache will be affected."

    Now the question is that whether…

  • What happens if an interrupt occurs as it is already disabled

    for ARMv7 architecture:What happens if an interrupt occurs as it is already disabled

  • question about Part C: Debug Architecure in ARMv7 ARM.pdf

    hi, experts:

    i am studying ARMv7 ARM.pdf's Part C: Debug Architecure.

    In Chapter C8.1.3, it described :

    Software can access DBGDSCRext,  DBGDTRRXext, and DBGDTRTXext through:

    .the CP14 interface:

      — in v7 Debug it is IMPLEMENTATION   DEFINED if these…

  • compiling kernel: -mcpu=cortex-a15 vs -march=armv7ve?

    I'm compiling an Android kernel for my Xperia Z using Linaro GCC 4.9. My question is, which option gives better optimization -mcpu=cortex-a15 or -march=armv7ve? Or do they give the same results?

  • How to Design secure boot on ARM based SoC?

    I have started working on TI's ARM based Soc and wanted to know how to design secure boot ?

    Is implementation of Secure boot is part of first stage boot-loader Rom boot loader ?

    I have gone through the below link as well

    ARM Information Center

    Can anyone…

  • Security Extensions in ARMv7

    "the Security Extensions integrate hardware security features into the architecture". Please can anybody make clear what exactly is "security" in hardware point of view in an ARMv7-A profile..?

    can you please give any real-time example…

  • Operation of ARMv7 pipeline for simple instructions

    I am new to ARM architecture and trying to understand ARMv7 pipelining.I am comfortable with armv7 instruction set

    Can anyon provied me simple example for operation ARMv7 pipeline with simple instrction?

    Thanks

    Amit

  • Branch Predictor detailed info

    Hi all,

    Is there any document related to the branch predictor algorithm utilized in the ARMV7 and ARMV8 and how the software (ABI) can be aptly developed ac-complying the same ?

  • Difference between co-processor registers and System registers

    Hi all,

    In ARMv-7 the co-processor register is used to configure the TCM, cache, MMU, MPU, etc.

    In ARMv-8 the co-processor logic is removed and integrated as the system register. Is there any performance difference by doing that ?