• CORTEX-A processor interrupt handling

    Since I am currently reading lot of ARM documents to understand the architecture as a whole, I request you to mention as to what happens in case of CORTEX-A processor in the nested interrupt handler implementation since we have a SPSR in CORTEX-A processors…

  • Performance effect because of removing some instructions from ARMv8?

    I was going through the ARMv8 Architecture Reference Manual and I came to know that it does not support many instructions that were previously supported by ARMv7 architecture. For example ARMv8 does not support conditional codes and have a seperate instruction…

  • ARMv7 Vs ARMv8 AArch32 Performance improvement

    Hello,

    I'm using an ARMv8 processor in 32 bit ARMv7 compatibility mode.

    I would like to know if there is any difference (performance gain) in ARMv8 running in AArch32 mode Vs running the same on an an ARMv7.

    Thanks!

  • Branch Predictor detailed info

    Hi all,

    Is there any document related to the branch predictor algorithm utilized in the ARMV7 and ARMV8 and how the software (ABI) can be aptly developed ac-complying the same ?

  • Difference between co-processor registers and System registers

    Hi all,

    In ARMv-7 the co-processor register is used to configure the TCM, cache, MMU, MPU, etc.

    In ARMv-8 the co-processor logic is removed and integrated as the system register. Is there any performance difference by doing that ?