hi, expert
i study ArmV8 architecture.
On taking an exception to a higher Exception level, the Execution state either:
• Remains unchanged.
• Changes from AArch32 state to AArch64 state.
i konw that…
All,
When I am using the cycle counter in AArch64, I am not getting cycles properly. I have enabled read of pmccntr_el0 in user space using a small kernel module. I have sample code like:
asm volatile("isb;mrs %0, pmccntr_el0" : "=r"(prev)); sleep…