• AMBA AXI can set data transfer cacheable or bufferable, I want ask this cache or buffer refer to the cache or buffer inside AXI interconnect or system cache?

    AMBA AXI can set data transfer cacheable or bufferable, I want ask this cache or buffer refer to the cache or buffer inside AXI interconnect or system cache?

    As usual, we talk about cache is mainly refer to the cache inside CPU, but AXI's cache or buffer…

  • Using shareable attribute in MPU configuration of Cortex R4

    Good day all,

    I'm working with a SOC with dual Cortex-R4 that comes with MPU.

    Due to the SRAM limitation and other restrictions, I'm not using any embedded linux or any other SMP RTOS.

    Currently I'm working on the optimization of the flow, so I'm…