• Why do we have to send HMASTLOCK signal to the slave?

    In AHB-Lite cases, every transfer starts with address phase with signals from master.

    And also in multi-master cases, arbiter decides with whether it can GRANT bus access to other masters or not.

    So, I think it's fine to only let masters or arbiters to…

  • Cortex-A5 and configuration for real time task

    Hello,

    in my recent design I have used a processor with Cortex-A5 core (it is SAMA5D27 from Microchip). There is one critical task which needs to be performed in real-time. Could you, please, give me a hint on how to configure the processor for that?