aarch64 kernel using aarch32 page tables

Hi !

I'm trying to update my custom kernel, working with short or long descriptor in armv7a to a target supporting armv8.

My current setup uses TTBR0 to point to the PL0 page table and TTBR1 to point to the PL1 page table.

At the moment, I sometimes use the PL0 bindings to write data from PL1  to PL0 (kernel space to user space), for example when I create a new process and copy the ELF code/data into userspace.

My first attempt is to update my kernel to run in EL1 aarch64 mode, and keep my applications in EL0 aarch32 mode. To keep the same behavior (using EL0 bindings at EL1), I think I have to use long aarch64 descriptor for EL0. So my question is:

While at EL1 aarch64 (using TTBR1 to map the kernel), can I point TTBR0 to a aarch32 long descriptor table to be able to access user data using PL0 bindings ?

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