When to enable ARM Cortex A8 L1 cache parity detection

Hi,

Our design use Cortex-A8 based AM335x.
We would like to know when to Enable the L1 cache parity(L1PE bit).
Is it before Cache invalidation or after Cache invalidation?
Couldn't find the procedure to enable L1 cache parity in Cortex-A8 manual.

Best Regards

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