How to explain the harvard architecture of ARM processor at instruction level?

It's said that most ARM processors are harvard architecture, which means that the instructon and data have physically separated memory space.

However , I just can't get the point. 

Could anyone give an explanation about these example instructions below. How instruction and Data is separated in these instructions?

ADD R0, R1, R2 @ R0 = R1 + R2 
LDR R0, [R1, R2] @ address pointed to by R1 + R2

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