Cortex m0 instruction set cycles

Hello

I'm eager to know about Cortex M0 instruction sets .

I've write a piece of code :

GPIOA->BSRR=GPIO_PIN_5;

GPIOA->BRR=GPIO_PIN_5;

and assembly code is :

   // GPIOA->BSRR=GPIO_PIN_5;

    0x8000214: 0x6001         STR       R1, [R0]

  //   GPIOA->BRR=GPIO_PIN_5;

    0x8000216: 0x6101         STR       R1, [R0, #0x10]

As in this document says "STR " takes  2 cycles.

But when i simulate in IAR and  check cyclecounter it's increment  by one .

it means it takes one cycle .

now i'm wondering my simulation has problem or i misunderstood the document .

Best Regards

Morteza

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