I cannot think of a good usecase of unaligned transfers in AXI3.
- For unaligned write, a master can anyway use aligned write + write strobes.
- For unaligned read, a master can use aligned read, then decides which data part of the first beat to use.
Can someone give an example of usecases of using AXI3 unaligned transfers?
It sounds like you are looking at this purely from a hardware designer's perspective (like I do), so there doesn't seem to be any sensible reason for this unaligned support.
But I believe the reason is that software might not consider the address alignment of the elements in a data structure, So for example a "char" is always aligned because it is an 8-bit value, but an "int" would typically be a 32-bit value, so if the "int" was packed into a data structure it might not be at a 32-bit aligned address, and then you could then see an attempt to perform a 32-bit write to address 0x1, which the hardware needs to convert into 2 write accesses, the first with WSTRB=4'b1110, and the second with WSTRB=4'b0001.
Hope that seems like a possible use case.
Thank you for the example, which now totally makes sense to me.
I was thinking that a possible usecase for unaligned read from the hardware perspective could be saving power when reading the first beat.
If the slave consists of multiple memories, e.g. four 8bit-width-memories, the slave does not need to read all memories for the first beat.
For example, a burst with a starting address of 0x2 and a burst size of 4bytes, only two memories need to be read.
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