ARMv8 mmu for EL0/1and EL3

Hi,

I have a A53 with 2 clusters with 4 cores each. Not planning to use EL2. I have a question on how the translation tables need to be setup for Arch64. with 4KB granule, 4GB PA

for EL3 I have level1, level2, level3 tables.

1) can the translation tables be shared between EL3 and EL0, EL1 ?

2) If need to use both TTBR0_EL1 and TTBR1_EL1, does this need separate set of tables?

Does ARM provide any guidelines on how the tables are shared?

thanks

PS

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