How should a AXI MASTER or SLAVE behave when a xREADY signal is never asserted?

Hi all,

I was trying to extract this information from the AXI specification but I didn't find any clear answer.

I wonder how should an AXI component behave if an input xREADY signal is never asserted.

Example 1: a master starts a write transaction by asserting AWVALID (and the other needed signals). That should be legal since the AWVALID is not allowed to depend AWREADY. And is also legal for the slave (even if not recommended) to assert AWREADY after AWVALID has been asserted. What happens now if AWREADY is never asserted?

Example 2: a master starts a write transaction by asserting AWVALID and the slave acknowledges it with AWREADY. Then the master asserts WVALID to write the data, but the slave hangs and never asserts WREADY. Should the master timeout? Is it possible to abort a transaction after it's started?

Thanks for the help

A

Parents
  • Hi Alessandro

    Zync SOC include ATB and AIB you had wanted.

    Please note the following TM.

     AXI timeout block (ATB) that works as a watchdog timer for interconnect hang.
     AXI isolation block (AIB) module that is responsible for the functionally that isolates the
    AXI/APB master from the slave in preparation for powering down an AXI/APB master or
    slave.

     

    AXI Timeout Block
    There is an AXI timeout block in the interconnect to ensure that the interconnect does not
    hang because of a non-responding slave. This block keeps track of AXI transactions and
    times out when the slave does not respond within a specific time. It responds to the master
    with a response. This completes the AXI transaction and prevents the master from hanging
    forever while waiting for the response from the slave.
    AXI and APB Isolation Block
    Interconnect has AXI and APB isolation block (AIB) units that are responsible for functionally
    isolating the AXI/APB master from the slave in preparation for an AXI/APB master or slave
    to be powered down. The AIB manages AXI and APB interfaces during the isolation process
    resulting in a graceful transition to a power-down state. The AIB is transparent and offers
    zero latency during normal transactions. When isolation is requested, the AIB blocks all new
    transactions generated by a master until all the outstanding interactions are completed by
    the slave, then isolates the slave by responding to all new transactions on behalf of the
    slave.

Reply
  • Hi Alessandro

    Zync SOC include ATB and AIB you had wanted.

    Please note the following TM.

     AXI timeout block (ATB) that works as a watchdog timer for interconnect hang.
     AXI isolation block (AIB) module that is responsible for the functionally that isolates the
    AXI/APB master from the slave in preparation for powering down an AXI/APB master or
    slave.

     

    AXI Timeout Block
    There is an AXI timeout block in the interconnect to ensure that the interconnect does not
    hang because of a non-responding slave. This block keeps track of AXI transactions and
    times out when the slave does not respond within a specific time. It responds to the master
    with a response. This completes the AXI transaction and prevents the master from hanging
    forever while waiting for the response from the slave.
    AXI and APB Isolation Block
    Interconnect has AXI and APB isolation block (AIB) units that are responsible for functionally
    isolating the AXI/APB master from the slave in preparation for an AXI/APB master or slave
    to be powered down. The AIB manages AXI and APB interfaces during the isolation process
    resulting in a graceful transition to a power-down state. The AIB is transparent and offers
    zero latency during normal transactions. When isolation is requested, the AIB blocks all new
    transactions generated by a master until all the outstanding interactions are completed by
    the slave, then isolates the slave by responding to all new transactions on behalf of the
    slave.

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