I am experimenting execution level switching on A53. I go from EL3->El2, then call SMC instruction to return to EL3. As soon as SMC instruction is executed, the processor enters EL3 mode and an exception is generated.
I have written an exception handler to return from this question. My question is should I use an ERET at the end of the exception handler? In that case will it go back to EL2 or will remain in EL3(since the exception was generated in EL2)? I would like for the processor to remain in EL3. SHould I manually modify the ELR so that the processor remains in EL3. I want to know how it is normally done.
In ARMv8-A AArch64, ERET is the only exception return instruction. You would normally expect to use an ERET at the end of the handler.
The SMC instruction executed in EL2 triggered an exception which caused entry to EL3. The automatically generated ELR_EL3 and SPSR_EL3 values will point back to EL2, to the instruction immediately after the SMC. Therefore if you don't modify the ELR/SPSR and execute ERET, that's where execution will go.
If you want to return somewhere you need to modify ELR and/or SPSR before executing ERET.
Although if you want to stay in EL3, you don't necessarily have to execute in ERET at all. You could just branch to whatever code you want to run next.
Thank you! This helps.
Hi rajtx i trying do transition from EL3 to EL2 exception ,but after ERET of EL3 mode it change the mode to EL2 , but as soon as when it will execute first instruction of EL2 , then It goes to Exception ...
This is happen for every secure to non secure transition in Armv8-A .
Please Guide if you know why this happen?
Thank you in advance.
The SMC instruction is used to generate a synchronous exception that is handled by Secure Monitor code running in EL3 Upsers.
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