I am using Omap3515 (Arm Cortex A8). Enabled I-Cache, D-Cache, Branch Prediction and MMU.
I am getting a data abort, if I try to copy a frame buffer of 600KB from an external memory region to another external memory region. After the data abort, I could notice that the SDR i.e SDRAM is not accessible.
I have enabled MMU in such a way that PA=VA.
There is no issue if I copy less amount data.
And also, If I disable D-Cache then there is no abort and it works fine. But I would like to enable D-Cache for faster access.
Thanks and regards,
Gopu
Hi,
Thanks alot for your updated code. I have checked with this code, the problem still exist.
As you have mentioned in your earlier post, the issue should be in SDRC, I will check it once I get DDR.
Thanks again,
Hello Gopu,
have there been any progress?
Form the phenomena, it would be clear that SDRAM could not accept the burst accesses from the SDRC.
You should better check again the setup parameters of SDRC.
That is, what are the contesnts of the follwoing registers.
SDRC_MCFG_p 0x6D00 0080 + (0x0000 0030 * p) ( p=0 or 1)
SDRC_MR_p 0x6D00 0084 + (0x0000 0030 * p)
SDRC_EMR2_p 0x6D00 008C + (0x0000 0030 * p)
SDRC_DLLA_CTRL 0x6D00 0060
SDRC_ACTIM_CTRLA_p 0x6D00 009C + (0x0000 0028 * p)
SDRC_ACTIM_CTRLB_p 0x6D00 00A0 + (0x0000 0028 * p)
SDRC_RFR_CTRL_p 0x6D00 00A4 + (0x0000 0030 * p)
I hope this will help you.
Best regards,
Yasuhiko Koumoto.
hi,
I will check this and let you know.