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Transactions sequencing by interconnect in ACE protocol

if a master issues a Coherent or Cache Maintenance transaction to a cache line and it receives a snoop transaction to the same cache line before it receives a response to the transaction it has issued, then the snoop transaction is defined as ordered first. which cache line have been talked about? suppose if its cache line of snooped cache then how can it gets coherent transaction and snoop transaction please explain this?

  • This is the idea that all coherent transactions need to occur in the same order for every component in the system.  Each manager device is operating independently, and so it is possible that multiple transactions for the same cache line (typically the same 64 byte region) could be issued at the same time by different managers.

    Consider a system with two ACE managers, M0 and M1 which have the same cache line in a Shared state.  Both M0 and M1 may wish to obtain a Unique copy of the same cache line at the same time, and so both issue a MakeUnique request - in other words, both M0 and M1 have issued a coherent transactions for the same address.

    The interconnect is then required to order these requests such that these transactions occur in the same order for M0 and M1 in order to prevent more than one manager holding the line in a Unique state at a time.  The interconnect will stall or hazard one of these requests to create an explicit ordering.  The sequence might be:

    - M0 and M1 both issue a MakeUnique

    - The interconnect chooses the MakeUnique from M1 as being ordered first. 

    - M0 will receive the CleanInvalid snoop (caused by the MakeUnique), and so can infer that its transaction to that cache line has been ordered second.

    - Once M1s MakeUnique completes and M1 has returned a RACK response, the interconnect can then un-stall the transaction from M0.  The transaction from M0 can then make progress.